ATM is a cell-based switching and multiplexing technology designed to be a general-purpose, connection-oriented transfer mode for a wide range of services. ATM handles both connection-oriented traffic directly or through adaptation layers, or connectionless traffic through the use of adaptation layers. ATM virtual connections may operate at either a Constant Bit Rate (CBR) or a Variable Bit Rate (VBR). Each ATM cell sent into the network contains addressing information that establishes a virtual connection from origination to destination. All cells are then transferred, in sequence, over this virtual connection. ATM provides either Permanent or Switched Virtual Connections (PVCs or SVCs). ATM is asynchronous because the transmitted cells need not be periodic as time slots of data are in Synchronous Transfer Mode (STM).
ATM offers the potential to standardize on one network architecture defining the multiplexing and switching method, with SONET/STM providing the basis for physical transmission standard for very high-speed rates. ATM also supports multiple Quality of Service classes for differing application requirements on delay and loss performance. Thus, the vision of ATM is that an entire network can be constructed using ATM and ATM Application Layers switching and multiplexing principles to support a wide range of all services, such as: voice, packet data (SMDS, IP, FR), video, imaging, and circuit emulation. ATM provides bandwidth-on-demand through the use of SVCs, and also supports LAN-like access to available bandwidth.
The primary unit in ATM is the cell. FIG. 1 illustrates an ATM cell 100 transmitted over transmission path 110. ATM defines a fixed-size cell with a length of 53 bytes comprised of a 5 byte header 101 and a 48 byte payload 102. Cells are mapped into a physical transmission path, such as the North American DS1, DS3, or SONET; European, E1, E3, and E4; or ITU-T STM standards; and various local fiber and electrical transmission payloads. All information is switched and multiplexed in an ATM network in these fixed-length cells. The cell header identifies the destination, cell type, and priority. The Virtual Path Identifier (VPI) 104 and Virtual Channel Identifier (VCI) 105 hold local significance only, and identify the destination. The Generic Flow Control (GFC) 103 field allows a multiplexer to control the rate of an ATM terminal. The Payload Type (PT) 106 indicates whether the cell contains user data, signaling data, or maintenance information. The Cell Loss Priority (CLP) 107 bit indicates the relative priority of the cell. Lower priority cells are discarded before higher priority cells during congested intervals.
Because of the critical nature of the information in the ATM cell header, ATM receivers use a Header Error Control (HEC) field 108 to detect and correct errors in the header. The payload field is passed through the network intact, with no error checking or correction. ATM relies on higher layer protocols to perform error checking and correction on the payload. The fixed cell size simplifies the implementation of ATM switches and multiplexers and enables implementation at very high speeds.
In the past, receiver units checked the 5 bytes in the header of the ATM cell and corrected any single bit error in the header before writing the ATM cell into a FIFO memory. If the header was not corrupted, the entire ATM cell was written into the FIFO memory. If a single bit error was in the header, the error would be corrected before writing the ATM cell into the FIFO memory. However, if there was a multiple bit error in the header, the header would not be correctable and the entire ATM cell would not be written into the FIFO. While the receiver checked the status of the header, the ATM cell was stored in a buffer. The result of this was that a latency period of 5 cycles was required to check the header and correct any error before the ATM cell was written into the FIFO.